Semiconductor storage device such as a NAND flash memory is facing increasing demand for further microfabrication. Narrower gate width and gate length of the memory cell requires smaller spacing between the adjacent memory-cell gate electrodes and thereby increases parasitic capacitance of the memory-cell gate electrodes to an unignorable level.
Parasitic capacitance expands the range of threshold voltage distribution and thus, leads to degradation in data reliability. The memory cells are typically isolated by providing an element isolation region between the adjacent memory cells and filling the element isolation region with an insulating film. However the relative dielectric constant of the fill insulating film is greater than 1. One approach for reducing capacitive coupling is providing an air gap in the element isolation region.
A typical air gap formation in the element isolation region includes formation of an insulating film to enclose the air gaps. However, formation of the insulating film after the formation of the air gap may cause refilling of the air gaps by the insulating film. Further, an element isolation region mostly configured by an air gap exhibits good electric properties but is not as strong as an element isolation region filled with an insulation film.